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Building microchips from the bottom up

MIT develops novel self-assembly method that could break size barrier
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Using a novel system based on molecules that can assemble themselves into precise patterns, MIT researchers have come up with a way of beating size limitations that would otherwise crimp improvements in data-storage media and electronic microchips.

Such self-assembling molecular systems, called block copolymers, have been known for many years, but the problem was that the regular patterns they produced were well-ordered only over very small areas. The MIT researchers found a way to combine this self-assembly with conventional lithographic chip-making technology, so that the lithographic patterns provide a set of "anchors" to hold the structure in place, while the self-assembling molecules fill in the fine detail between the anchors.

The work, carried out by three MIT professors and three graduate students, is being reported this week in the journal Science.

Karl Berggren, the Emanuel E. Landsman Associate Professor of Electrical Engineering in MIT's Department of Electrical Engineering and Computer Science, explains that without the lithographed "pillars" to anchor the pattern, the self-assembling molecules "would be a mess of randomly arranged lattices." But with the pillars, "the block copolymer lattice is sort of fooled by these pillars, and forms its array around them. They form a nice, ordered pattern around the pillars."

Edwin L. Thomas, Morris Cohen Professor of Materials Science and Engineering and head of the department, who is also a co-author of the paper, says that the original inspiration came from a graduate student, Ion Bita, who now works for Qualcomm in California. Bita explains that "by properly choosing the spatial distribution of the pillars to match a desired final structure, it was possible to consistently generate defect-free polymer nanostructures."

The molecules themselves are made from a pair of polymer chains that are bonded together. The chains are chemically different, like oil and water, and do not mix. As a result, when spread on a surface they naturally separate into an orderly array, forming a pattern of tiny balls, each about 20 nanometers across. By using similar molecules with shorter chains, the resulting structures could be made even smaller, says Caroline Ross, Toyota Professor in MIT's Department of Materials Science and Engineering.

"Nature allows you to get these really well-ordered structures without doing much work," because of the way the molecules assemble themselves, Ross says. "It sort of magically forms these structures."

By changing the spacing of the pillars they create on the chip surface, the new method makes it possible to control the size and spacing of the overall pattern, Berggren says. The pillars themselves are placed on the surface using advanced high-resolution electron-beam lithography methods that have also been developed at MIT.

The most immediate application will be for improving the storage capacity of magnetic storage systems such as the hard disk drives used in computers, he says. For that application, the new method could be tested within the next year or two, he says. "The state of the industry in magnetic media is really ready for this," Berggren says. "They really need something right now."

In the future, by creating more complex patterns in the lithographic part of the process, entire computer chips could be made this way, says Ross. "The ultimate goal would be a complete self-assembling chip structure," she says. The lithographic step, instead of just a regular grid of dots as in the present system, could produce a more complex pattern of dots, lines and junctions, with the block copolymers then filling in the patterns between them.

"Ultimately, this is a technology that is very high-resolution and very scalable," Berggren says. It could also be used for other kinds of devices, including energy technology applications such as electrodes for fuel cells.

MIT graduate students Joel Yang and Yeon Sik Jung also worked on the project. It was funded by the National Science Foundation, the Semiconductor Research Corp., the Nanoelectronics Research Initiative, King Abdulaziz City for Science and Technology and Alfaisal University, and the Singapore-MIT Alliance.

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