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SMART develops a way to commercially manufacture integrated silicon III-V chips

New method from MIT’s research enterprise in Singapore paves the way for improved optoelectronic and 5G devices.
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A LEES researcher reviews a 200 mm Silicon III-V wafer.
A LEES researcher reviews a 200 mm Silicon III-V wafer.
Photo: SMART
LEES innovative silicon III-V manufacturing process
LEES innovative silicon III-V manufacturing process
Image: SMART

The Singapore-MIT Alliance for Research and Technology (SMART), MIT’s research enterprise in Singapore, has announced the successful development of a commercially viable way to manufacture integrated silicon III-V chips with high-performance III-V devices inserted into their design.

In most devices today, silicon-based CMOS chips are used for computing, but they are not efficient for illumination and communications, resulting in low efficiency and heat generation. This is why current 5G mobile devices on the market get very hot upon use and can shut down after a short time.

This is where III-V semiconductors are valuable. III-V chips are made with compounds including elements in the third and fifth columns of the periodic table, such as gallium nitride (GaN) and indium gallium arsenide (InGaAs). Due to their unique properties, they are exceptionally well-suited for optoelectronics (such as LEDs) and communications (such as 5G wireless), boosting efficiency substantially.

“By integrating III-V into silicon, we can build upon existing manufacturing capabilities and low-cost volume production techniques of silicon and include the unique optical and electronic functionality of III-V technology,” says Eugene Fitzgerald, CEO and director of SMART and the Merton C. Flemings-SMA Professor of Materials Science and Engineering at MIT. “The new chips will be at the heart of future product innovation and power the next generation of communications devices, wearables, and displays.”

Kenneth Lee, senior scientific director of the SMART Low Energy Electronic Systems (LEES) research program, adds: “Integrating III-V semiconductor devices with silicon in a commercially viable way is one of the most difficult challenges faced by the semiconductor industry, even though such integrated circuits have been desired for decades. Current methods are expensive and inefficient, which is delaying the availability of the chips the industry needs. With our new process, we can leverage existing capabilities to manufacture these new integrated silicon III-V chips cost-effectively and accelerate the development and adoption of new technologies that will power economies.”

The new technology developed by SMART builds two layers of silicon and III-V devices on separate substrates and integrates them vertically together within a micron, which is 1/50th the diameter of a human hair. The process can use existing 200 micrometer manufacturing tools, which will allow semiconductor manufacturers in Singapore and around the world to make new use of their current equipment. Today, the cost of investing in a new manufacturing technology is in the range of tens of billions of dollars; the new integrated circuit platform is highly cost-effective, and will result in much lower-cost novel circuits and electronic systems.

SMART is focusing on creating new chips for pixelated illumination/display and 5G markets, which has a combined potential market of over $100 billion. Other markets that SMART’s new integrated silicon III-V chips will disrupt include wearable mini-displays, virtual reality applications, and other imaging technologies.

The patent portfolio has been exclusively licensed by New Silicon Corporation (NSC), a Singapore-based spinoff from SMART. NSC is the first fabless silicon integrated circuit company with proprietary materials, processes, devices, and design for monolithic integrated silicon III-V circuits.

SMART’s new integrated Silicon III-V chips will be available next year and expected in products by 2021.

SMART’s LEES Interdisciplinary Research Group is creating new integrated circuit technologies that result in increased functionality, lower power consumption, and higher performance for electronic systems. These integrated circuits of the future will impact applications in wireless communications, power electronics, LED lighting, and displays. LEES has a vertically-integrated research team possessing expertise in materials, devices, and circuits, comprising multiple individuals with professional experience within the semiconductor industry. This ensures that the research is targeted to meet the needs of the semiconductor industry both within Singapore and globally.

Press Mentions


Prof. Eugene Fitzgerald, CEO and director of the Singapore-MIT Alliance for Research and Technology (SMART), speaks with Bloomberg News about how researchers have developed a new way to manufacture integrated silicon III-V chips. “We were able to create a technology that allows us to bring in higher-performing semiconductors, but still use the same manufacturing technology,” Fitzgerald explains.

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