New technique significantly reduces training and inference time on extensive datasets to keep pace with fast-moving data in finance, social networks, and fraud detection in cryptocurrency.
CSAIL scientists’ novel hardware attack against the Apple M1 chip defeats the last line of security while leaving no trace.
Technique would allow addition of optical communication components to existing chips with little modification of their designs.
System enables large speedups — as much as 88-fold — on common parallel-computing algorithms.
AIM Photonics fall meeting attendees tackle plans for making computer chips with integrated optical devices and developing a regional workforce.
Design lets chip manage local memory stores efficiently using an Internet-style communication network.
“Lock-free” parallel algorithms may match performance of more complex “wait-free” algorithms.
A new language lets coders reason about the trade-off between fidelity of execution and power or time savings in the computers of the future.
MIT research shows that it may be time to let software, rather than hardware, manage the high-speed on-chip memory banks known as ‘caches.’
MIT researchers discover efficient control of magnetism in chiral ferromagnets.
New design for a basic component of all computer chips boasts the highest ‘carrier mobility’ yet measured.
MIT researchers develop the smallest indium gallium arsenide transistor ever built.
A new system makes hardware models of multicore chips more efficient, easier to design and more reliable.
The data-routing techniques that undergird the Internet could increase the efficiency of multicore chips while lowering their power requirements.
A new software-simulation system promises much more accurate evaluation of promising — but potentially fault-ridden — multicore-chip designs.